The FPGA-targeted VI appears to “run” on the FPGA, but does not run in the same way as code executed by the RT target. This bitfile is obtained by compiling the LabVIEW VI: the G code (graphical block diagram code) is translated into VHDL and then the Xilinx tools take over from there. The FPGA requires a bitstream file (or bitfile) to establish its myriad circuit connections. Programming the FPGA is similar to the desktop computer in the sense that you create LabVIEW code, however, the similarity stops there. The real-time operating system (RTOS) distinguishes the RT target from a conventional OS by offering precision loop timing and high reliability (low down-time). Coding for the RT target is quite similar because the RT target is also a processor – think of the RT target as a special-purpose computer tailored for embedded systems. You likely have experience creating LabVIEW applications to run on a desktop computer. LabVIEW RIO programming compared to desktop environment
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